M. Sc.

Denis Djekic

Academic staff member
Institute of Smart Sensors

Contact

+49 711 685 69233
+49 711 685 67222

Pfaffenwaldring 47
70569 Stuttgart
Deutschland
Room: 4.111

Subject

  • Analog circuit design
  • High-performance current readouts
  • Transimpedance amplifiers using highly modified pseudo-resistors in the feedback
Journals, conferences, and books:
  1. 2018

    1. H. Schütz, D. Djekic, S. Gambach, H. Kaim, R. Steinhoff, and A. Rothermel, “Current Mode Communication Scheme for Subretinal Implants with 8mV RMS Wire Potential,” in 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Bordeaux, France, 2018.
    2. D. Djekic, G. Fantner, K. Lips, M. Ortmanns, and J. Anders, “A 0.1% THD, 1-MΩ to 1-GΩ Tunable, Temperature-Compensated Transimpedance Amplifier Using a Multi-Element Pseudo-Resistor,” IEEE Journal of Solid-State Circuits, 2018.
    3. J. Schmidt et al., “Proof of concept for an optogalvanic gas sensor for NO based on Rydberg excitations,” Applied Physics Letters, 2018.
    4. M. Rajabzadeh, D. Djekic, M. Häberle, J. Becker, J. Anders, and M. Ortmanns, “Comparison Study of Integrated Potentiostats: Resistive-TIA, Capacitive-TIA, CT Σ∆ Modulator,” in IEEE International Symposium on Circuits & Systems (ISCAS), Florence, Italy, 2018.
    5. D. Djekic, K. Lips, J. Behrends, G. Fantner, M. Ortmanns, and J. Anders, “Ein Multielement-Pseudowiderstand im Rückkoppelpfad eines Transimpedanzverstärkers für hochsensitive Strommessungen,” in Workshop Analogschaltungen, University of Freiburg, Germany, 2018.
    6. M. Häberle, D. Djekic, G. Fantner, K. Lips, M. Ortmanns, and J. Anders, “An integrator-differentiator TIA using a multi-element pseudo-resistor in its DC servo loop for enhanced noise performance,” in 44th European Solid State Circuits Conference (ESSCIRC), Dresden, Germany, 2018.
  2. 2017

    1. D. Djekic, G. Fantner, J. Behrends, K. Lips, M. Ortmanns, and J. Anders, “A Transimpedance Amplifier Using a Widely Tunable PVT-Independent Pseudo-Resistor for High-Performance Current Sensing Applications,” in 43rd European Solid State Circuits Conference (ESSCIRC), Leuven, Belgium, 2017.
    2. D. Djekic, K. Lips, J. Behrends, G. Fantner, M. Ortmanns, and J. Anders, “Linearisierter, Temperatur- und Prozess-unabhängiger Transimpedanzverstärker für hochsensitive Stromausleseschaltungen,” in Kleinheubacher Tagung, Miltenberg, Germany, 2017.
  3. 2016

    1. D. Djekic, M. Ortmanns, G. Fantner, and J. Anders, “Linearisierte Pseudo-Widerstände mit hoher Robustheit für die Raster-Ionenstrommikroskopie,” in Analogworkshop 2016, Leibniz Universität Hannover, 2016.
    2. D. Djekic, M. Ortmanns, G. Fantner, and J. Anders, “A Tunable, Robust Pseudo-Resistor with Enhanced Linearity for Scanning Ion-Conductance Microscopy,” in IEEE International Symposium on Circuits and Systems (ISCAS 2016), Montréal, Québec, Canada, 2016.
    3. D. Djekic, M. Häberle, M. Ortmanns, K. Lips, J. Behrends, and J. Anders, “Hochohmige, robuste Pseudo-Widerstände mit verbesserter Linearität für die elektrisch detektierte Magnetresonanz,” in Kleinheubacher Tagung, Miltenberg, Germany, 2016.
  • Exercises in Circuit Design in Nanometer Scaled CMOS
  • 2008 - 2014: Studies of electrical engineering at the University of Ulm
  • 2014 - 2017: Member of the academic staff at the Institute of Microelectronics, University of Ulm
  • Since 2017: Member of the academic staff at the Institute of Smart Sensors, University of Stuttgart
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