IIS research in the spotlight

In this letter, we present an integrated readout chip for magnetoresistive (MR) sensors consisting of a readout chain that comprises a DC-coupled fully differential difference amplifier (FDDA) followed by a programmable gain amplifier (PGA), as well as a low-noise current biasing scheme for the MR sensor. The current bias scheme features a 10-bit digital-toanalog converter (DAC) to compensate for process variations of the MR sensing element as well as to calibrate for variations in the DC bias field of the sensor. The bias current source achieves a very low current noise floor of 2.2pA/√Hz for bias currents up to 1mA. The readout chip is manufactured in 180nm SOI CMOS and consumes a total power of 38mW. The paper is an extended version of 1, incorporating additional modeling details and measurement results.

A. Mohamed, M. Wagner, H. Heidari and J. Anders, "A frontend for magnetoresistive sensors with a 2.2 pA/√Hz low-noise current source," in IEEE Solid-State Circuits Letters, doi: 10.1109/LSSC.2022.3148362.