Electron Spin Resonance
Phase Locked Loops
- K. Khan et al., “A 12.2 to 14.9 GHz injection-locked VCO array with an on-chip 50 MHz BW semi-digital PLL for transient spin manipulation and detection,” in 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), in 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2022, pp. 1--4.
- H. Elmar, K. Leonhard, and K. M. K. U. Hassan, “Digital-Analog-Umsetzer mit in Reihe geschalteten Kapazitäten,” DE: 10 2018 206 453.9, 2019
- S. A. Jawed, S. S. Afridi, M. A. Anjum, and K. Khan, “IO circuit design for 2.5 D through-silicon-interposer interconnects,” International Journal of Circuit Theory and Applications, vol. 45, no. 3, Art. no. 3, 2017.
- S. A. Jawed et al., “A configurable 2-Gbps LVDS transceiver in 150-nm CMOS with pre-emphasis, equalization, and slew rate control,” International Journal of Circuit Theory and Applications, vol. 45, no. 10, Art. no. 10, 2017.
Muhammad Khubaib Khan completed his Bachelors in Electrical Engineering from National University of Sciences and Technology (NUST), Islamabad in 2013.
Afterwards he joined Karachi Institute of Economics and Technology (PAF-KIET) in 2014 as a Research Assistant/Tutor where he worked with a team on the topic of LVDS IOs.
In 2018 he received his Masters from University of Ulm in Communications Technology with a focus on microelectronics. His Master's Theses was with Fraunhofer IIS, where he worked on SAR ADCs for ultra-low power applications on 22nm FDSOI technology.
Since July 2018 he is associated with The Institute of Smart Sensors towards designing spectrometers for the project of NanoSpin which envisions to increase the sensitivity while reducing the cost and size of the spectrometer.