Circuit Design in Nanometer Scaled CMOS (M. Sc.)

March 15, 2019 /

Lecture and exercise in summer term 2019

In this lecture, the students will come into contact with the problems associated with the most advanced CMOS technology nodes concerning transistor modeling and behavior, as well as the related design issues. The students will learn about short channel and narrow width effects in nm-scaled CMOS, design approaches for non-square-law MOS models, and thereafter learn about digital and analog design in sub 100nm CMOS technologies.

The course will lead the students to the "real world" of todays MOS technology and design and will also provide an outlook to future, non-planar MOS devices. Students will understand the importance of feedback for improved design performance and apply to advanced operational amplifier architectures including three and four stage designs. The students will also learn about the effects of mismatch and noise on deep submicron designs and investigate strategies to mitigate their effects. Finally, students will be introduced to advanced power management and data converter concepts.

Further information


This image shows Jens Anders

Jens Anders

Prof. Dr.

Institute Director

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